#include "at32f403a_407_int.h"
#include "wk_system.h"
#include "usbd_int.h"
#include "usbd_core.h"
#include "wk_usart.h"


extern usbd_core_type usb_core_dev;
void buff_dma_flush(void);
extern volatile uint32_t LCD_RAM_DMA_TRANSFER;

void NMI_Handler(void)
{
    
}


void HardFault_Handler(void)
{
  /* add user code begin HardFault_IRQ 0 */
  extern uint32_t __Vectors;
  __disable_irq();
  __set_MSP(__Vectors);
  NVIC_SystemReset();
  /* add user code end HardFault_IRQ 0 */
  /* go to infinite loop when hard fault exception occurs */
  while (1)
  {
    /* add user code begin W1_HardFault_IRQ 0 */

    /* add user code end W1_HardFault_IRQ 0 */
  }
}


void MemManage_Handler(void)
{
  while (1)
  {
      
  }
}


void BusFault_Handler(void)
{
  while (1)
  {
      
  }
}


void UsageFault_Handler(void)
{
  while (1)
  {
      
  }
}



void DebugMon_Handler(void)
{
    
}

void SysTick_Handler(void)
{
    wk_timebase_increase();
}




void DMA1_Channel1_IRQHandler(void)
{
    if(dma_interrupt_flag_get(DMA1_FDT1_FLAG))
    {
        dma_flag_clear(DMA1_FDT1_FLAG);
        // dma_channel_enable(DMA1_CHANNEL1, TRUE);
    }
}

void DMA1_Channel2_IRQHandler(void)
{
    if(dma_interrupt_flag_get(DMA1_FDT2_FLAG))
    {
        dma_flag_clear(DMA1_FDT2_FLAG);
        // dma_channel_enable(DMA1_CHANNEL2, TRUE);
    }
}

void DMA1_Channel3_IRQHandler(void)
{
    if(dma_interrupt_flag_get(DMA1_FDT3_FLAG))
    {
        dma_flag_clear(DMA1_FDT3_FLAG);
        dma_channel_enable(DMA1_CHANNEL3, FALSE);
    }
}

void DMA1_Channel4_IRQHandler(void)
{
    if(dma_interrupt_flag_get(DMA1_FDT4_FLAG))
    {
        dma_flag_clear(DMA1_FDT4_FLAG);
        dma_channel_enable(DMA1_CHANNEL4, FALSE);
    }
}





void DMA2_Channel1_IRQHandler(void)
{
    if(dma_interrupt_flag_get(DMA2_FDT1_FLAG))
    {
        dma_flag_clear(DMA2_FDT1_FLAG);
        dma_channel_enable(DMA2_CHANNEL1, FALSE);
        LCD_RAM_DMA_TRANSFER = 0;
        buff_dma_flush();
    }
}

void USART1_IRQHandler(void)
{
    if(usart_flag_get(USART1, USART_IDLEF_FLAG) != RESET)
    {
        usart_flag_clear(USART1, USART_IDLEF_FLAG);
        usart_data_receive(USART1);

        rx1_count = UART1_RX_BUFFER_SIZE - (dma_data_number_get(DMA1_CHANNEL1));
        rx1_flag = 1;

        dma_channel_enable(DMA1_CHANNEL1, FALSE);
        dma_data_number_set(DMA1_CHANNEL1, UART1_RX_BUFFER_SIZE);
        dma_channel_enable(DMA1_CHANNEL1, TRUE);
    }
}

void UART5_IRQHandler(void)
{
    if(usart_flag_get(UART5, USART_IDLEF_FLAG) != RESET)
    {
        usart_flag_clear(UART5, USART_IDLEF_FLAG);
        usart_data_receive(UART5);

        rx5_count = UART5_RX_BUFFER_SIZE - (dma_data_number_get(DMA1_CHANNEL2));
        rx5_flag = 1;

        dma_channel_enable(DMA1_CHANNEL2, FALSE);;
        dma_data_number_set(DMA1_CHANNEL2, UART5_RX_BUFFER_SIZE);
        dma_channel_enable(DMA1_CHANNEL2, TRUE);
    }
}






void TMR3_GLOBAL_IRQHandler(void)
{
    
}


void TMR6_GLOBAL_IRQHandler(void)
{
    
}


void TMR8_BRK_TMR12_IRQHandler(void)
{
    
}

void TMR8_OVF_TMR13_IRQHandler(void)
{
    
    
}

void TMR8_TRG_HALL_TMR14_IRQHandler(void)
{
    
}

void USBFS_L_CAN1_RX0_IRQHandler(void)
{
    usbd_irq_handler(&usb_core_dev);
}
